Engineering
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Introduction to RISC-V (LFD110x)

Course Cover

4

(5)

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Course Features

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Duration

10 hours

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Delivery Method

Online

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Available on

Limited Access

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Accessibility

Mobile, Desktop, Laptop

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Language

English

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Subtitles

English

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Level

Beginner

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Teaching Type

Self Paced

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Video Content

10 hours

Course Description

The RISC-V architecture is open and free instruction set architecture (ISA) that opens up a new period of innovation in processors through an open-standard collaboration. This course will help you understand the different aspects of gaining an understanding of the RISC-V community ecosystem, RISC-V International, the RISC-V specifications, and how you can assist in curating and developing these specifications, as well as the practical aspects involved in working RISC-V both as a developer and an end-user.

Course Overview

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Instructor-Moderated Discussions

Skills You Will Gain

Prerequisites/Requirements

There are no specific prerequisites, although a solid grounding in computer architecture will help greatly, especially in chapters 4 and 5.

What You Will Learn

You will learn about the nature, history, ongoing practices and other fundamentals of RISC-V as a technology, an international organization, and a community of developers and implementers

You will also see how RISC-V technical working groups are organized, as well as explore the basis of community-based open specification development, and how the RISC-V ISA is developed as an open specification

You will learn how people and organizations can benefit from and contribute to RISC-V, and will be able to put the RISC-V ISA into action with a simulator booting the Linux operating system

Target Students

This course is designed for RISC-V enthusiasts, hardware nerds, and anyone else interested in the details of how an open source ISA is breaking down barriers and opening up new opportunities in the microprocessor world.

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